Fix clobber_abi and disallow SVE-related registers in Arm64EC inline assembly

4 files changed, 109 insertions, 0 deletions

diff --git a/tests/codegen/asm-arm64ec-clobbers.rs b/tests/codegen/asm-arm64ec-clobbers.rs
new file mode 100644
index 00000000000..2ec61907947
--- /dev/null
+++ b/tests/codegen/asm-arm64ec-clobbers.rs
@@ -0,0 +1,36 @@
+//@ assembly-output: emit-asm
+//@ compile-flags: --target arm64ec-pc-windows-msvc
+//@ needs-llvm-components: aarch64
+
+#![crate_type = "rlib"]
+#![feature(no_core, rustc_attrs, lang_items, asm_experimental_arch)]
+#![no_core]
+
+#[lang = "sized"]
+trait Sized {}
+
+#[rustc_builtin_macro]
+macro_rules! asm {
+    () => {};
+}
+
+// CHECK-LABEL: @cc_clobber
+// CHECK: call void asm sideeffect "", "~{cc}"()
+#[no_mangle]
+pub unsafe fn cc_clobber() {
+    asm!("", options(nostack, nomem));
+}
+
+// CHECK-LABEL: @no_clobber
+// CHECK: call void asm sideeffect "", ""()
+#[no_mangle]
+pub unsafe fn no_clobber() {
+    asm!("", options(nostack, nomem, preserves_flags));
+}
+
+// CHECK-LABEL: @clobber_abi
+// CHECK: asm sideeffect "", "={w0},={w1},={w2},={w3},={w4},={w5},={w6},={w7},={w8},={w9},={w10},={w11},={w12},={w15},={w16},={w17},={w30},={q0},={q1},={q2},={q3},={q4},={q5},={q6},={q7},={q8},={q9},={q10},={q11},={q12},={q13},={q14},={q15}"()
+#[no_mangle]
+pub unsafe fn clobber_abi() {
+    asm!("", clobber_abi("C"), options(nostack, nomem, preserves_flags));
+}
diff --git a/tests/ui/asm/aarch64/aarch64-sve.rs b/tests/ui/asm/aarch64/aarch64-sve.rs
new file mode 100644
index 00000000000..8cdc9dd4266
--- /dev/null
+++ b/tests/ui/asm/aarch64/aarch64-sve.rs
@@ -0,0 +1,28 @@
+//@ only-aarch64
+//@ build-pass
+//@ needs-asm-support
+
+#![crate_type = "rlib"]
+#![feature(no_core, rustc_attrs, lang_items)]
+#![no_core]
+
+// AArch64 test corresponding to arm64ec-sve.rs.
+
+#[lang = "sized"]
+trait Sized {}
+#[lang = "copy"]
+trait Copy {}
+
+impl Copy for f64 {}
+
+#[rustc_builtin_macro]
+macro_rules! asm {
+    () => {};
+}
+
+fn f(x: f64) {
+    unsafe {
+        asm!("", out("p0") _);
+        asm!("", out("ffr") _);
+    }
+}
diff --git a/tests/ui/asm/aarch64/arm64ec-sve.rs b/tests/ui/asm/aarch64/arm64ec-sve.rs
new file mode 100644
index 00000000000..389b365a754
--- /dev/null
+++ b/tests/ui/asm/aarch64/arm64ec-sve.rs
@@ -0,0 +1,31 @@
+//@ compile-flags: --target arm64ec-pc-windows-msvc
+//@ needs-asm-support
+//@ needs-llvm-components: aarch64
+
+#![crate_type = "rlib"]
+#![feature(no_core, rustc_attrs, lang_items, asm_experimental_arch)]
+#![no_core]
+
+// SVE cannot be used for Arm64EC
+// https://github.com/rust-lang/rust/pull/131332#issuecomment-2401189142
+
+#[lang = "sized"]
+trait Sized {}
+#[lang = "copy"]
+trait Copy {}
+
+impl Copy for f64 {}
+
+#[rustc_builtin_macro]
+macro_rules! asm {
+    () => {};
+}
+
+fn f(x: f64) {
+    unsafe {
+        asm!("", out("p0") _);
+        //~^ ERROR cannot use register `p0`
+        asm!("", out("ffr") _);
+        //~^ ERROR cannot use register `ffr`
+    }
+}
diff --git a/tests/ui/asm/aarch64/arm64ec-sve.stderr b/tests/ui/asm/aarch64/arm64ec-sve.stderr
new file mode 100644
index 00000000000..3e1a5d57004
--- /dev/null
+++ b/tests/ui/asm/aarch64/arm64ec-sve.stderr
@@ -0,0 +1,14 @@
+error: cannot use register `p0`: x13, x14, x23, x24, x28, v16-v31, p*, ffr cannot be used for Arm64EC
+  --> $DIR/arm64ec-sve.rs:26:18
+   |
+LL |         asm!("", out("p0") _);
+   |                  ^^^^^^^^^^^
+
+error: cannot use register `ffr`: x13, x14, x23, x24, x28, v16-v31, p*, ffr cannot be used for Arm64EC
+  --> $DIR/arm64ec-sve.rs:28:18
+   |
+LL |         asm!("", out("ffr") _);
+   |                  ^^^^^^^^^^^^
+
+error: aborting due to 2 previous errors
+