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authorbors <bors@rust-lang.org>2023-04-13 11:41:57 +0000
committerbors <bors@rust-lang.org>2023-04-13 11:41:57 +0000
commite14b81f10de3e528f13692ab97ee90c5d96b170a (patch)
treea3b0332e07a773140b4c38c0f7b65c2ac812e419 /tests
parentfab99073b01539ce2664366011c7f3e378e52b7e (diff)
parent2ac8dee44fe81c75d998597d236b23470f41142e (diff)
downloadrust-e14b81f10de3e528f13692ab97ee90c5d96b170a.tar.gz
rust-e14b81f10de3e528f13692ab97ee90c5d96b170a.zip
Auto merge of #109989 - ids1024:m68k-asm, r=Amanieu
Add inline assembly support for m68k

I believe this should be correct, to the extent I understand the logic around inline assembly. M68k is fairly straightforward here, other than having separate address registers.
Diffstat (limited to 'tests')
-rw-r--r--tests/assembly/asm/m68k-types.rs83
1 files changed, 83 insertions, 0 deletions
diff --git a/tests/assembly/asm/m68k-types.rs b/tests/assembly/asm/m68k-types.rs
new file mode 100644
index 00000000000..0322e615a19
--- /dev/null
+++ b/tests/assembly/asm/m68k-types.rs
@@ -0,0 +1,83 @@
+// assembly-output: emit-asm
+// compile-flags: --target m68k-unknown-linux-gnu
+// needs-llvm-components: m68k
+
+#![feature(no_core, lang_items, rustc_attrs, asm_experimental_arch)]
+#![crate_type = "rlib"]
+#![no_core]
+#![allow(non_camel_case_types)]
+
+#[rustc_builtin_macro]
+macro_rules! asm {
+    () => {};
+}
+#[rustc_builtin_macro]
+macro_rules! concat {
+    () => {};
+}
+
+#[lang = "sized"]
+trait Sized {}
+#[lang = "copy"]
+trait Copy {}
+
+type ptr = *const u64;
+
+impl Copy for i8 {}
+impl Copy for i16 {}
+impl Copy for i32 {}
+impl Copy for i64 {}
+impl Copy for ptr {}
+
+macro_rules! check {
+    ($func:ident $ty:ident $class:ident $mov:literal) => {
+        #[no_mangle]
+        pub unsafe fn $func(x: $ty) -> $ty {
+            let y;
+            asm!(concat!($mov, " {}, {};"), out($class) y, in($class) x);
+            y
+        }
+    };
+}
+
+// CHECK-LABEL: reg_data_i8:
+// CHECK: ;APP
+// CHECK: move.b %d{{[0-9]}}, %d{{[0-9]}}
+// CHECK: ;NO_APP
+check!(reg_data_i8 i8 reg_data "move.b");
+
+// CHECK-LABEL: reg_data_i16:
+// CHECK: ;APP
+// CHECK: move.w %d{{[0-9]}}, %d{{[0-9]}}
+// CHECK: ;NO_APP
+check!(reg_data_i16 i16 reg_data "move.w");
+
+// CHECK-LABEL: reg_data_i32:
+// CHECK: ;APP
+// CHECK: move.l %d{{[0-9]}}, %d{{[0-9]}}
+// CHECK: ;NO_APP
+check!(reg_data_i32 i32 reg_data "move.l");
+
+// CHECK-LABEL: reg_addr_i16:
+// CHECK: ;APP
+// CHECK: move.w %a{{[0-9]}}, %a{{[0-9]}}
+// CHECK: ;NO_APP
+check!(reg_addr_i16 i16 reg_addr "move.w");
+
+// CHECK-LABEL: reg_addr_i32:
+// CHECK: ;APP
+// CHECK: move.l %a{{[0-9]}}, %a{{[0-9]}}
+// CHECK: ;NO_APP
+check!(reg_addr_i32 i32 reg_addr "move.l");
+
+// CHECK-LABEL: reg_i16:
+// CHECK: ;APP
+// CHECK: move.w %{{[da][0-9]}}, %{{[da][0-9]}}
+// CHECK: ;NO_APP
+check!(reg_i16 i16 reg "move.w");
+
+// CHECK-LABEL: reg_i32:
+// CHECK: ;APP
+// CHECK: move.l %{{[da][0-9]}}, %{{[da][0-9]}}
+// CHECK: ;NO_APP
+check!(reg_i32 i32 reg "move.l");