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-rw-r--r--src/librustc_target/asm/mod.rs8
-rw-r--r--src/librustc_target/asm/riscv.rs1
-rw-r--r--src/librustc_target/asm/x86.rs23
3 files changed, 26 insertions, 6 deletions
diff --git a/src/librustc_target/asm/mod.rs b/src/librustc_target/asm/mod.rs
index f1e8457cacc..2a0c51f2afd 100644
--- a/src/librustc_target/asm/mod.rs
+++ b/src/librustc_target/asm/mod.rs
@@ -87,7 +87,7 @@ macro_rules! def_regs {
                 match name {
                     $(
                         $($alias)|* | $reg_name => {
-                            $($filter(_arch, &mut _has_feature)?;)?
+                            $($filter(_arch, &mut _has_feature, false)?;)?
                             Ok(Self::$reg)
                         }
                     )*
@@ -109,7 +109,7 @@ macro_rules! def_regs {
         ) {
             use super::{InlineAsmReg, InlineAsmRegClass};
             $(
-                if $($filter(_arch, &mut _has_feature).is_ok() &&)? true {
+                if $($filter(_arch, &mut _has_feature, true).is_ok() &&)? true {
                     if let Some(set) = map.get_mut(&InlineAsmRegClass::$arch($arch_regclass::$class)) {
                         set.insert(InlineAsmReg::$arch($arch_reg::$reg));
                     }
@@ -239,6 +239,8 @@ impl InlineAsmReg {
         })
     }
 
+    // NOTE: This function isn't used at the moment, but is needed to support
+    // falling back to an external assembler.
     pub fn emit(
         self,
         out: &mut dyn fmt::Write,
@@ -542,6 +544,8 @@ impl fmt::Display for InlineAsmType {
 /// registers in each register class. A particular register may be allocatable
 /// from multiple register classes, in which case it will appear multiple times
 /// in the map.
+// NOTE: This function isn't used at the moment, but is needed to support
+// falling back to an external assembler.
 pub fn allocatable_registers(
     arch: InlineAsmArch,
     has_feature: impl FnMut(&str) -> bool,
diff --git a/src/librustc_target/asm/riscv.rs b/src/librustc_target/asm/riscv.rs
index 7da30cc8875..3ff542247ff 100644
--- a/src/librustc_target/asm/riscv.rs
+++ b/src/librustc_target/asm/riscv.rs
@@ -50,6 +50,7 @@ impl RiscVInlineAsmRegClass {
 fn not_e(
     _arch: InlineAsmArch,
     mut has_feature: impl FnMut(&str) -> bool,
+    _allocating: bool,
 ) -> Result<(), &'static str> {
     if has_feature("e") {
         Err("register can't be used with the `e` target feature")
diff --git a/src/librustc_target/asm/x86.rs b/src/librustc_target/asm/x86.rs
index 6eb99b0180f..065bb14966f 100644
--- a/src/librustc_target/asm/x86.rs
+++ b/src/librustc_target/asm/x86.rs
@@ -131,6 +131,7 @@ impl X86InlineAsmRegClass {
 fn x86_64_only(
     arch: InlineAsmArch,
     _has_feature: impl FnMut(&str) -> bool,
+    _allocating: bool,
 ) -> Result<(), &'static str> {
     match arch {
         InlineAsmArch::X86 => Err("register is only available on x86_64"),
@@ -139,6 +140,20 @@ fn x86_64_only(
     }
 }
 
+fn high_byte(
+    arch: InlineAsmArch,
+    _has_feature: impl FnMut(&str) -> bool,
+    allocating: bool,
+) -> Result<(), &'static str> {
+    match arch {
+        InlineAsmArch::X86_64 if allocating => {
+            // The error message isn't actually used...
+            Err("high byte registers are not allocated by reg_byte")
+        }
+        _ => Ok(()),
+    }
+}
+
 def_regs! {
     X86 X86InlineAsmReg X86InlineAsmRegClass {
         ax: reg, reg_abcd = ["ax", "eax", "rax"],
@@ -156,13 +171,13 @@ def_regs! {
         r14: reg = ["r14", "r14w", "r14d"] % x86_64_only,
         r15: reg = ["r15", "r15w", "r15d"] % x86_64_only,
         al: reg_byte = ["al"],
-        ah: reg_byte = ["ah"],
+        ah: reg_byte = ["ah"] % high_byte,
         bl: reg_byte = ["bl"],
-        bh: reg_byte = ["bh"],
+        bh: reg_byte = ["bh"] % high_byte,
         cl: reg_byte = ["cl"],
-        ch: reg_byte = ["ch"],
+        ch: reg_byte = ["ch"] % high_byte,
         dl: reg_byte = ["dl"],
-        dh: reg_byte = ["dh"],
+        dh: reg_byte = ["dh"] % high_byte,
         sil: reg_byte = ["sil"] % x86_64_only,
         dil: reg_byte = ["dil"] % x86_64_only,
         r8b: reg_byte = ["r8b"] % x86_64_only,