diff options
| -rw-r--r-- | library/stdarch/crates/core_arch/src/lib.rs | 1 | ||||
| -rw-r--r-- | library/stdarch/crates/core_arch/src/x86/cpuid.rs | 33 |
2 files changed, 21 insertions, 13 deletions
diff --git a/library/stdarch/crates/core_arch/src/lib.rs b/library/stdarch/crates/core_arch/src/lib.rs index 2c744c2ffb9..e3af125a68d 100644 --- a/library/stdarch/crates/core_arch/src/lib.rs +++ b/library/stdarch/crates/core_arch/src/lib.rs @@ -4,6 +4,7 @@ #![allow(unused_features)] #![allow(incomplete_features)] #![feature( + asm, const_fn, const_fn_union, const_fn_transmute, diff --git a/library/stdarch/crates/core_arch/src/x86/cpuid.rs b/library/stdarch/crates/core_arch/src/x86/cpuid.rs index f292ae7b54d..42cc95b4d09 100644 --- a/library/stdarch/crates/core_arch/src/x86/cpuid.rs +++ b/library/stdarch/crates/core_arch/src/x86/cpuid.rs @@ -55,26 +55,33 @@ pub unsafe fn __cpuid_count(leaf: u32, sub_leaf: u32) -> CpuidResult { let ebx; let ecx; let edx; + #[cfg(target_arch = "x86")] { - llvm_asm!("cpuid" - : "={eax}"(eax), "={ebx}"(ebx), "={ecx}"(ecx), "={edx}"(edx) - : "{eax}"(leaf), "{ecx}"(sub_leaf) - : :); + asm!( + "cpuid", + inlateout("eax") leaf => eax, + lateout("ebx") ebx, + inlateout("ecx") sub_leaf => ecx, + lateout("edx") edx, + options(nostack, preserves_flags), + ); } #[cfg(target_arch = "x86_64")] { - // x86-64 uses %rbx as the base register, so preserve it. + // x86-64 uses `rbx` as the base register, so preserve it. // This works around a bug in LLVM with ASAN enabled: // https://bugs.llvm.org/show_bug.cgi?id=17907 - llvm_asm!(r#" - mov %rbx, %rsi - cpuid - xchg %rbx, %rsi - "# - : "={eax}"(eax), "={esi}"(ebx), "={ecx}"(ecx), "={edx}"(edx) - : "{eax}"(leaf), "{ecx}"(sub_leaf) - : :); + asm!( + "mov rsi, rbx", + "cpuid", + "xchg rsi, rbx", + inlateout("eax") leaf => eax, + lateout("esi") ebx, + inlateout("ecx") sub_leaf => ecx, + lateout("edx") edx, + options(nostack, preserves_flags), + ); } CpuidResult { eax, ebx, ecx, edx } } |