diff options
| -rw-r--r-- | src/attributes.rs | 9 | ||||
| -rw-r--r-- | src/base.rs | 24 | ||||
| -rw-r--r-- | src/gcc_util.rs | 9 |
3 files changed, 15 insertions, 27 deletions
diff --git a/src/attributes.rs b/src/attributes.rs index ced13848c0b..971e019a4f6 100644 --- a/src/attributes.rs +++ b/src/attributes.rs @@ -94,14 +94,18 @@ pub fn from_fn_attrs<'gcc, 'tcx>( })) .collect::<Vec<_>>(); - // TODO(antoyo): cg_llvm add global features to each function so that LTO keep them. + // TODO(antoyo): cg_llvm adds global features to each function so that LTO keep them. // Check if GCC requires the same. let mut global_features = cx.tcx.global_backend_features(()).iter().map(|s| s.as_str()); function_features.extend(&mut global_features); let target_features = function_features .iter() .filter_map(|feature| { - if feature.contains("soft-float") || feature.contains("retpoline-external-thunk") { + // FIXME(antoyo): for some reasons, disabling SSE results in the following error when + // compiling Rust for Linux: + // SSE register return with SSE disabled + // TODO(antoyo): support soft-float and retpoline-external-thunk. + if feature.contains("soft-float") || feature.contains("retpoline-external-thunk") || *feature == "-sse" { return None; } @@ -118,7 +122,6 @@ pub fn from_fn_attrs<'gcc, 'tcx>( .collect::<Vec<_>>() .join(","); if !target_features.is_empty() { - println!("Function {:?}", function_features); #[cfg(feature="master")] func.add_attribute(FnAttribute::Target(&target_features)); } diff --git a/src/base.rs b/src/base.rs index 380be341704..91efcf18bf4 100644 --- a/src/base.rs +++ b/src/base.rs @@ -98,32 +98,10 @@ pub fn compile_codegen_unit(tcx: TyCtxt<'_>, cgu_name: Symbol, target_info: Lock .map(|string| &string[1..]) .collect(); - let add_cpu_feature_flag = |feature: &str| { - if target_info.cpu_supports(feature) && !disabled_features.contains(feature) { - context.add_command_line_option(&format!("-m{}", feature)); - } - }; - - let disable_cpu_feature = |feature: &str| { - if disabled_features.contains(feature) { - context.add_command_line_option(&format!("-mno-{}", feature)); - } - }; - // TODO(antoyo): only set on x86 platforms. context.add_command_line_option("-masm=intel"); - // TODO: instead of setting the features manually, set the correct -march flag. - let features = ["64", "avxvnni", "bmi", "sse2", "avx2", "sha", "fma", "fma4", "gfni", "f16c", "aes", "bmi2", "pclmul", "rtm", - "vaes", "vpclmulqdq", "xsavec", - ]; - - - for feature in &features { - disable_cpu_feature(feature); - - //add_cpu_feature_flag(feature); - } + // TODO(antoyo): set the correct -march flag. if !disabled_features.contains("avx") { // NOTE: we always enable AVX because the equivalent of llvm.x86.sse2.cmp.pd in GCC for diff --git a/src/gcc_util.rs b/src/gcc_util.rs index da1c0dfe559..09a0af5d00d 100644 --- a/src/gcc_util.rs +++ b/src/gcc_util.rs @@ -100,7 +100,14 @@ pub(crate) fn global_gcc_features(sess: &Session, diagnostics: bool) -> Vec<Stri Some(to_gcc_features(sess, feature) .iter() .flat_map(|feat| to_gcc_features(sess, feat).into_iter()) - .map(String::from) + .map(|feature| { + if enable_disable == '-' { + format!("-{}", feature) + } + else { + feature.to_string() + } + }) .collect::<Vec<_>>(), ) }) |