diff options
| -rw-r--r-- | src/etc/platform-intrinsics/x86/rdrand.json | 27 | ||||
| -rw-r--r-- | src/etc/platform-intrinsics/x86/rdseed.json | 27 | ||||
| -rw-r--r-- | src/librustc_driver/target_features.rs | 2 | ||||
| -rw-r--r-- | src/librustc_platform_intrinsics/x86.rs | 30 |
4 files changed, 85 insertions, 1 deletions
diff --git a/src/etc/platform-intrinsics/x86/rdrand.json b/src/etc/platform-intrinsics/x86/rdrand.json new file mode 100644 index 00000000000..fa2feb4224b --- /dev/null +++ b/src/etc/platform-intrinsics/x86/rdrand.json @@ -0,0 +1,27 @@ +{ + "intrinsic_prefix": "_rdrand", + "llvm_prefix": "llvm.x86.rdrand.", + "intrinsics": [ + { + "intrinsic": "16_step", + "width": ["0"], + "llvm": "16", + "ret": "(U16,S32)", + "args": [] + }, + { + "intrinsic": "32_step", + "width": ["0"], + "llvm": "32", + "ret": "(U32,S32)", + "args": [] + }, + { + "intrinsic": "64_step", + "width": ["0"], + "llvm": "64", + "ret": "(U64,S32)", + "args": [] + } + ] +} diff --git a/src/etc/platform-intrinsics/x86/rdseed.json b/src/etc/platform-intrinsics/x86/rdseed.json new file mode 100644 index 00000000000..7be64b583e0 --- /dev/null +++ b/src/etc/platform-intrinsics/x86/rdseed.json @@ -0,0 +1,27 @@ +{ + "intrinsic_prefix": "_rdseed", + "llvm_prefix": "llvm.x86.rdseed.", + "intrinsics": [ + { + "intrinsic": "16_step", + "width": ["0"], + "llvm": "16", + "ret": "(U16,S32)", + "args": [] + }, + { + "intrinsic": "32_step", + "width": ["0"], + "llvm": "32", + "ret": "(U32,S32)", + "args": [] + }, + { + "intrinsic": "64_step", + "width": ["0"], + "llvm": "64", + "ret": "(U64,S32)", + "args": [] + } + ] +} diff --git a/src/librustc_driver/target_features.rs b/src/librustc_driver/target_features.rs index 124e7aafcc5..0744fbbd4e9 100644 --- a/src/librustc_driver/target_features.rs +++ b/src/librustc_driver/target_features.rs @@ -25,7 +25,7 @@ const ARM_WHITELIST: &'static [&'static str] = &["neon\0", "vfp2\0", "vfp3\0", " const X86_WHITELIST: &'static [&'static str] = &["avx\0", "avx2\0", "bmi\0", "bmi2\0", "sse\0", "sse2\0", "sse3\0", "sse4.1\0", "sse4.2\0", "ssse3\0", "tbm\0", "lzcnt\0", "popcnt\0", - "sse4a\0"]; + "sse4a\0", "rdrnd\0", "rdseed\0"]; /// Add `target_feature = "..."` cfgs for a variety of platform /// specific features (SSE, NEON etc.). diff --git a/src/librustc_platform_intrinsics/x86.rs b/src/librustc_platform_intrinsics/x86.rs index 91ecad8402f..acb69423ffe 100644 --- a/src/librustc_platform_intrinsics/x86.rs +++ b/src/librustc_platform_intrinsics/x86.rs @@ -872,6 +872,36 @@ pub fn find(name: &str) -> Option<Intrinsic> { output: &::F64x4, definition: Named("llvm.x86.fma.vfnmsub.pd.256") }, + "_rdrand16_step" => Intrinsic { + inputs: { static INPUTS: [&'static Type; 0] = []; &INPUTS }, + output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 2] = [&::U16, &::I32]; &PARTS }); &AGG }, + definition: Named("llvm.x86.rdrand.16") + }, + "_rdrand32_step" => Intrinsic { + inputs: { static INPUTS: [&'static Type; 0] = []; &INPUTS }, + output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 2] = [&::U32, &::I32]; &PARTS }); &AGG }, + definition: Named("llvm.x86.rdrand.32") + }, + "_rdrand64_step" => Intrinsic { + inputs: { static INPUTS: [&'static Type; 0] = []; &INPUTS }, + output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 2] = [&::U64, &::I32]; &PARTS }); &AGG }, + definition: Named("llvm.x86.rdrand.64") + }, + "_rdseed16_step" => Intrinsic { + inputs: { static INPUTS: [&'static Type; 0] = []; &INPUTS }, + output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 2] = [&::U16, &::I32]; &PARTS }); &AGG }, + definition: Named("llvm.x86.rdseed.16") + }, + "_rdseed32_step" => Intrinsic { + inputs: { static INPUTS: [&'static Type; 0] = []; &INPUTS }, + output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 2] = [&::U32, &::I32]; &PARTS }); &AGG }, + definition: Named("llvm.x86.rdseed.32") + }, + "_rdseed64_step" => Intrinsic { + inputs: { static INPUTS: [&'static Type; 0] = []; &INPUTS }, + output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 2] = [&::U64, &::I32]; &PARTS }); &AGG }, + definition: Named("llvm.x86.rdseed.64") + }, "_mm_adds_epi8" => Intrinsic { inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS }, output: &::I8x16, |