diff options
| -rw-r--r-- | src/base.rs | 25 |
1 files changed, 18 insertions, 7 deletions
diff --git a/src/base.rs b/src/base.rs index bb88c89fa53..380be341704 100644 --- a/src/base.rs +++ b/src/base.rs @@ -104,22 +104,33 @@ pub fn compile_codegen_unit(tcx: TyCtxt<'_>, cgu_name: Symbol, target_info: Lock } }; + let disable_cpu_feature = |feature: &str| { + if disabled_features.contains(feature) { + context.add_command_line_option(&format!("-mno-{}", feature)); + } + }; + // TODO(antoyo): only set on x86 platforms. context.add_command_line_option("-masm=intel"); // TODO: instead of setting the features manually, set the correct -march flag. - /*let features = ["64", "avxvnni", "bmi", "sse2", "avx2", "sha", "fma", "fma4", "gfni", "f16c", "aes", "bmi2", "pclmul", "rtm", + let features = ["64", "avxvnni", "bmi", "sse2", "avx2", "sha", "fma", "fma4", "gfni", "f16c", "aes", "bmi2", "pclmul", "rtm", "vaes", "vpclmulqdq", "xsavec", ]; + for feature in &features { - add_cpu_feature_flag(feature); - }*/ + disable_cpu_feature(feature); - // NOTE: we always enable AVX because the equivalent of llvm.x86.sse2.cmp.pd in GCC for - // SSE2 is multiple builtins, so we use the AVX __builtin_ia32_cmppd instead. - // FIXME(antoyo): use the proper builtins for llvm.x86.sse2.cmp.pd and similar. - context.add_command_line_option("-mavx"); + //add_cpu_feature_flag(feature); + } + + if !disabled_features.contains("avx") { + // NOTE: we always enable AVX because the equivalent of llvm.x86.sse2.cmp.pd in GCC for + // SSE2 is multiple builtins, so we use the AVX __builtin_ia32_cmppd instead. + // FIXME(antoyo): use the proper builtins for llvm.x86.sse2.cmp.pd and similar. + context.add_command_line_option("-mavx"); + } for arg in &tcx.sess.opts.cg.llvm_args { context.add_command_line_option(arg); |