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-rw-r--r--compiler/rustc_codegen_llvm/src/llvm/ffi.rs1
-rw-r--r--compiler/rustc_codegen_llvm/src/llvm_util.rs1
-rw-r--r--compiler/rustc_codegen_llvm/src/type_.rs4
-rw-r--r--compiler/rustc_codegen_llvm/src/type_of.rs19
4 files changed, 2 insertions, 23 deletions
diff --git a/compiler/rustc_codegen_llvm/src/llvm/ffi.rs b/compiler/rustc_codegen_llvm/src/llvm/ffi.rs
index 4942c997682..45c5f56f447 100644
--- a/compiler/rustc_codegen_llvm/src/llvm/ffi.rs
+++ b/compiler/rustc_codegen_llvm/src/llvm/ffi.rs
@@ -948,7 +948,6 @@ extern "C" {
 
     // Operations on other types
     pub fn LLVMVoidTypeInContext(C: &Context) -> &Type;
-    pub fn LLVMX86MMXTypeInContext(C: &Context) -> &Type;
     pub fn LLVMRustMetadataTypeInContext(C: &Context) -> &Type;
 
     // Operations on all values
diff --git a/compiler/rustc_codegen_llvm/src/llvm_util.rs b/compiler/rustc_codegen_llvm/src/llvm_util.rs
index f0b50459837..900f2df383a 100644
--- a/compiler/rustc_codegen_llvm/src/llvm_util.rs
+++ b/compiler/rustc_codegen_llvm/src/llvm_util.rs
@@ -203,7 +203,6 @@ const X86_ALLOWED_FEATURES: &[(&str, Option<Symbol>)] = &[
     ("fma", None),
     ("fxsr", None),
     ("lzcnt", None),
-    ("mmx", Some(sym::mmx_target_feature)),
     ("movbe", Some(sym::movbe_target_feature)),
     ("pclmulqdq", None),
     ("popcnt", None),
diff --git a/compiler/rustc_codegen_llvm/src/type_.rs b/compiler/rustc_codegen_llvm/src/type_.rs
index 3b53b4fe77b..a43724fd495 100644
--- a/compiler/rustc_codegen_llvm/src/type_.rs
+++ b/compiler/rustc_codegen_llvm/src/type_.rs
@@ -62,10 +62,6 @@ impl CodegenCx<'ll, 'tcx> {
         unsafe { llvm::LLVMIntTypeInContext(self.llcx, num_bits as c_uint) }
     }
 
-    crate fn type_x86_mmx(&self) -> &'ll Type {
-        unsafe { llvm::LLVMX86MMXTypeInContext(self.llcx) }
-    }
-
     crate fn type_vector(&self, ty: &'ll Type, len: u64) -> &'ll Type {
         unsafe { llvm::LLVMVectorType(ty, len as c_uint) }
     }
diff --git a/compiler/rustc_codegen_llvm/src/type_of.rs b/compiler/rustc_codegen_llvm/src/type_of.rs
index 12901de6048..e0754d21df1 100644
--- a/compiler/rustc_codegen_llvm/src/type_of.rs
+++ b/compiler/rustc_codegen_llvm/src/type_of.rs
@@ -21,23 +21,8 @@ fn uncached_llvm_type<'a, 'tcx>(
     match layout.abi {
         Abi::Scalar(_) => bug!("handled elsewhere"),
         Abi::Vector { ref element, count } => {
-            // LLVM has a separate type for 64-bit SIMD vectors on X86 called
-            // `x86_mmx` which is needed for some SIMD operations. As a bit of a
-            // hack (all SIMD definitions are super unstable anyway) we
-            // recognize any one-element SIMD vector as "this should be an
-            // x86_mmx" type. In general there shouldn't be a need for other
-            // one-element SIMD vectors, so it's assumed this won't clash with
-            // much else.
-            let use_x86_mmx = count == 1
-                && layout.size.bits() == 64
-                && (cx.sess().target.target.arch == "x86"
-                    || cx.sess().target.target.arch == "x86_64");
-            if use_x86_mmx {
-                return cx.type_x86_mmx();
-            } else {
-                let element = layout.scalar_llvm_type_at(cx, element, Size::ZERO);
-                return cx.type_vector(element, count);
-            }
+            let element = layout.scalar_llvm_type_at(cx, element, Size::ZERO);
+            return cx.type_vector(element, count);
         }
         Abi::ScalarPair(..) => {
             return cx.type_struct(