diff options
Diffstat (limited to 'compiler/rustc_target/src')
| -rw-r--r-- | compiler/rustc_target/src/spec/abi_map.rs | 15 | ||||
| -rw-r--r-- | compiler/rustc_target/src/spec/json.rs | 3 | ||||
| -rw-r--r-- | compiler/rustc_target/src/spec/mod.rs | 4 | ||||
| -rw-r--r-- | compiler/rustc_target/src/spec/targets/armv7a_vex_v5.rs | 44 | ||||
| -rw-r--r-- | compiler/rustc_target/src/spec/targets/armv7a_vex_v5_linker_script.ld | 144 |
5 files changed, 209 insertions, 1 deletions
diff --git a/compiler/rustc_target/src/spec/abi_map.rs b/compiler/rustc_target/src/spec/abi_map.rs index b13e2112478..23e74539ddc 100644 --- a/compiler/rustc_target/src/spec/abi_map.rs +++ b/compiler/rustc_target/src/spec/abi_map.rs @@ -60,7 +60,15 @@ impl AbiMap { "x86_64" => Arch::X86_64, _ => Arch::Other, }; - let os = if target.is_like_windows { OsKind::Windows } else { OsKind::Other }; + + let os = if target.is_like_windows { + OsKind::Windows + } else if target.is_like_vexos { + OsKind::VEXos + } else { + OsKind::Other + }; + AbiMap { arch, os } } @@ -82,6 +90,10 @@ impl AbiMap { (ExternAbi::System { .. }, Arch::X86) if os == OsKind::Windows && !has_c_varargs => { CanonAbi::X86(X86Call::Stdcall) } + (ExternAbi::System { .. }, Arch::Arm(..)) if self.os == OsKind::VEXos => { + // Calls to VEXos APIs do not use VFP registers. + CanonAbi::Arm(ArmCall::Aapcs) + } (ExternAbi::System { .. }, _) => CanonAbi::C, // fallible lowerings @@ -191,6 +203,7 @@ enum Arch { #[derive(Debug, PartialEq, Copy, Clone)] enum OsKind { Windows, + VEXos, Other, } diff --git a/compiler/rustc_target/src/spec/json.rs b/compiler/rustc_target/src/spec/json.rs index d27c1929aef..6c44b7ff52f 100644 --- a/compiler/rustc_target/src/spec/json.rs +++ b/compiler/rustc_target/src/spec/json.rs @@ -153,6 +153,7 @@ impl Target { forward!(is_like_msvc); forward!(is_like_wasm); forward!(is_like_android); + forward!(is_like_vexos); forward!(binary_format); forward!(default_dwarf_version); forward!(allows_weak_linkage); @@ -345,6 +346,7 @@ impl ToJson for Target { target_option_val!(is_like_msvc); target_option_val!(is_like_wasm); target_option_val!(is_like_android); + target_option_val!(is_like_vexos); target_option_val!(binary_format); target_option_val!(default_dwarf_version); target_option_val!(allows_weak_linkage); @@ -538,6 +540,7 @@ struct TargetSpecJson { is_like_msvc: Option<bool>, is_like_wasm: Option<bool>, is_like_android: Option<bool>, + is_like_vexos: Option<bool>, binary_format: Option<BinaryFormat>, default_dwarf_version: Option<u32>, allows_weak_linkage: Option<bool>, diff --git a/compiler/rustc_target/src/spec/mod.rs b/compiler/rustc_target/src/spec/mod.rs index 033590e01a6..b9fbff8db05 100644 --- a/compiler/rustc_target/src/spec/mod.rs +++ b/compiler/rustc_target/src/spec/mod.rs @@ -2101,6 +2101,7 @@ supported_targets! { ("armv7a-none-eabihf", armv7a_none_eabihf), ("armv7a-nuttx-eabi", armv7a_nuttx_eabi), ("armv7a-nuttx-eabihf", armv7a_nuttx_eabihf), + ("armv7a-vex-v5", armv7a_vex_v5), ("msp430-none-elf", msp430_none_elf), @@ -2571,6 +2572,8 @@ pub struct TargetOptions { pub is_like_wasm: bool, /// Whether a target toolchain is like Android, implying a Linux kernel and a Bionic libc pub is_like_android: bool, + /// Whether a target toolchain is like VEXos, the operating system used by the VEX Robotics V5 Brain. + pub is_like_vexos: bool, /// Target's binary file format. Defaults to BinaryFormat::Elf pub binary_format: BinaryFormat, /// Default supported version of DWARF on this platform. @@ -2953,6 +2956,7 @@ impl Default for TargetOptions { is_like_msvc: false, is_like_wasm: false, is_like_android: false, + is_like_vexos: false, binary_format: BinaryFormat::Elf, default_dwarf_version: 4, allows_weak_linkage: true, diff --git a/compiler/rustc_target/src/spec/targets/armv7a_vex_v5.rs b/compiler/rustc_target/src/spec/targets/armv7a_vex_v5.rs new file mode 100644 index 00000000000..e78f7839974 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/armv7a_vex_v5.rs @@ -0,0 +1,44 @@ +use crate::spec::{ + Cc, FloatAbi, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetMetadata, + TargetOptions, +}; + +const LINKER_SCRIPT: &str = include_str!("./armv7a_vex_v5_linker_script.ld"); + +pub(crate) fn target() -> Target { + let opts = TargetOptions { + vendor: "vex".into(), + env: "v5".into(), + os: "vexos".into(), + cpu: "cortex-a9".into(), + abi: "eabihf".into(), + is_like_vexos: true, + llvm_floatabi: Some(FloatAbi::Hard), + linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes), + linker: Some("rust-lld".into()), + features: "+v7,+neon,+vfp3d16,+thumb2".into(), + relocation_model: RelocModel::Static, + disable_redzone: true, + max_atomic_width: Some(64), + panic_strategy: PanicStrategy::Abort, + emit_debug_gdb_scripts: false, + c_enum_min_bits: Some(8), + default_uwtable: true, + has_thumb_interworking: true, + link_script: Some(LINKER_SCRIPT.into()), + ..Default::default() + }; + Target { + llvm_target: "armv7a-none-eabihf".into(), + metadata: TargetMetadata { + description: Some("ARMv7-A Cortex-A9 VEX V5 Brain".into()), + tier: Some(3), + host_tools: Some(false), + std: Some(false), + }, + pointer_width: 32, + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + arch: "arm".into(), + options: opts, + } +} diff --git a/compiler/rustc_target/src/spec/targets/armv7a_vex_v5_linker_script.ld b/compiler/rustc_target/src/spec/targets/armv7a_vex_v5_linker_script.ld new file mode 100644 index 00000000000..a4783de0183 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/armv7a_vex_v5_linker_script.ld @@ -0,0 +1,144 @@ +OUTPUT_FORMAT("elf32-littlearm") +ENTRY(_boot) + +/* + * PROVIDE() is used here so that users can override default values. + * This is intended to give developers the option to use this Rust + * target even if the default values in this linker script aren't + * suitable for their needs. + * + * For example: `-C link-arg=--defsym=__stack_length=8M` could + * be used to increase the stack size above the value set in this + * file. + */ + +PROVIDE(__vcodesig_magic = 0x35585658); /* XVX5 */ +PROVIDE(__vcodesig_type = 0); /* V5_SIG_TYPE_USER */ +PROVIDE(__vcodesig_owner = 2); /* V5_SIG_OWNER_PARTNER */ +PROVIDE(__vcodesig_options = 0); /* none (0) */ + +PROVIDE(__user_ram_start = 0x03800000); +PROVIDE(__user_ram_length = 48M); +PROVIDE(__user_ram_end = __user_ram_start + __user_ram_length); /* 0x8000000 */ + +PROVIDE(__code_signature_length = 0x20); + +PROVIDE(__stack_length = 4M); +PROVIDE(__heap_end = __user_ram_end - __stack_length); +PROVIDE(__user_length = __heap_start - __user_ram_start); + +MEMORY { + USER_RAM (RWX) : ORIGIN = __user_ram_start, LENGTH = __user_ram_length +} + +SECTIONS { + /* + * VEXos expects program binaries to have a 32-byte header called a "code signature" + * at their start which tells the OS that we are a valid program and configures some + * miscellaneous startup behavior. + */ + .code_signature : { + LONG(__vcodesig_magic) + LONG(__vcodesig_type) + LONG(__vcodesig_owner) + LONG(__vcodesig_options) + + FILL(0) + . = __user_ram_start + __code_signature_length; + } > USER_RAM + + /* + * Executable program instructions. + */ + .text : { + /* _boot routine (entry point from VEXos, must be at 0x03800020) */ + *(.boot) + + /* The rest of the program. */ + *(.text .text.*) + } > USER_RAM + + /* + * Global/uninitialized/static/constant data sections. + */ + .rodata : { + *(.rodata .rodata1 .rodata.*) + *(.srodata .srodata.*) + } > USER_RAM + + /* + * ARM Stack Unwinding Sections + * + * These sections are added by the compiler in some cases to facilitate stack unwinding. + * __eh_frame_start and similar symbols are used by libunwind. + */ + + .except_ordered : { + PROVIDE(__extab_start = .); + *(.gcc_except_table *.gcc_except_table.*) + *(.ARM.extab*) + PROVIDE(__extab_end = .); + } > USER_RAM + + .eh_frame_hdr : { + /* see https://github.com/llvm/llvm-project/blob/main/libunwind/src/AddressSpace.hpp#L78 */ + PROVIDE(__eh_frame_hdr_start = .); + KEEP(*(.eh_frame_hdr)) + PROVIDE(__eh_frame_hdr_end = .); + } > USER_RAM + + .eh_frame : { + PROVIDE(__eh_frame_start = .); + KEEP(*(.eh_frame)) + PROVIDE(__eh_frame_end = .); + } > USER_RAM + + .except_unordered : { + PROVIDE(__exidx_start = .); + *(.ARM.exidx*) + PROVIDE(__exidx_end = .); + } > USER_RAM + + /* -- Data intended to be mutable at runtime begins here. -- */ + + .data : { + *(.data .data1 .data.*) + *(.sdata .sdata.* .sdata2.*) + } > USER_RAM + + /* -- End of loadable sections - anything beyond this point shouldn't go in the binary uploaded to the device. -- */ + + .bss (NOLOAD) : { + __bss_start = .; + *(.sbss*) + *(.bss .bss.*) + + /* Align the heap */ + . = ALIGN(8); + __bss_end = .; + } > USER_RAM + + /* + * Active memory sections for the stack/heap. + * + * Because these are (NOLOAD), they will not influence the final size of the binary. + */ + .heap (NOLOAD) : { + __heap_start = .; + . = __heap_end; + } > USER_RAM + + .stack (NOLOAD) : ALIGN(8) { + __stack_bottom = .; + . += __stack_length; + __stack_top = .; + } > USER_RAM + + /* + * `.ARM.attributes` contains arch metadata for compatibility purposes, but we + * only target one hardware configuration, meaning it'd just take up space. + */ + /DISCARD/ : { + *(.ARM.attributes*) + } +} |