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-rw-r--r--src/comp/middle/ty.rs3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/comp/middle/ty.rs b/src/comp/middle/ty.rs
index 96479c4096d..d57b8071b06 100644
--- a/src/comp/middle/ty.rs
+++ b/src/comp/middle/ty.rs
@@ -1877,6 +1877,9 @@ mod Unify {
         // TODO: occurs check, to make sure we don't loop forever when
         // unifying e.g. 'a and option['a]
 
+        // Fast path.
+        if (eq_ty(expected, actual)) { ret ures_ok(expected); }
+
         alt (actual.struct) {
             // If the RHS is a variable type, then just do the appropriate
             // binding.