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-rw-r--r--tests/codegen-llvm/enum/enum-discriminant-eq.rs14
-rw-r--r--tests/codegen-llvm/enum/enum-transparent-extract.rs31
2 files changed, 41 insertions, 4 deletions
diff --git a/tests/codegen-llvm/enum/enum-discriminant-eq.rs b/tests/codegen-llvm/enum/enum-discriminant-eq.rs
index 0494c5f551b..d599685c2e5 100644
--- a/tests/codegen-llvm/enum/enum-discriminant-eq.rs
+++ b/tests/codegen-llvm/enum/enum-discriminant-eq.rs
@@ -1,6 +1,9 @@
 //@ compile-flags: -Copt-level=3 -Zmerge-functions=disabled
 //@ min-llvm-version: 20
 //@ only-64bit
+//@ revisions: LLVM20 LLVM21
+//@ [LLVM21] min-llvm-version: 21
+//@ [LLVM20] max-llvm-major-version: 20
 
 // The `derive(PartialEq)` on enums with field-less variants compares discriminants,
 // so make sure we emit that in some reasonable way.
@@ -137,17 +140,20 @@ pub fn mid_nz32_eq_discr(a: Mid<NonZero<u32>>, b: Mid<NonZero<u32>>) -> bool {
 pub fn mid_ac_eq_discr(a: Mid<AC>, b: Mid<AC>) -> bool {
     // CHECK-LABEL: @mid_ac_eq_discr(
 
-    // CHECK: %[[A_REL_DISCR:.+]] = xor i8 %a, -128
+    // LLVM20: %[[A_REL_DISCR:.+]] = xor i8 %a, -128
     // CHECK: %[[A_IS_NICHE:.+]] = icmp slt i8 %a, 0
     // CHECK: %[[A_NOT_HOLE:.+]] = icmp ne i8 %a, -127
     // CHECK: tail call void @llvm.assume(i1 %[[A_NOT_HOLE]])
-    // CHECK: %[[A_DISCR:.+]] = select i1 %[[A_IS_NICHE]], i8 %[[A_REL_DISCR]], i8 1
+    // LLVM20: %[[A_DISCR:.+]] = select i1 %[[A_IS_NICHE]], i8 %[[A_REL_DISCR]], i8 1
 
-    // CHECK: %[[B_REL_DISCR:.+]] = xor i8 %b, -128
+    // LLVM20: %[[B_REL_DISCR:.+]] = xor i8 %b, -128
     // CHECK: %[[B_IS_NICHE:.+]] = icmp slt i8 %b, 0
     // CHECK: %[[B_NOT_HOLE:.+]] = icmp ne i8 %b, -127
     // CHECK: tail call void @llvm.assume(i1 %[[B_NOT_HOLE]])
-    // CHECK: %[[B_DISCR:.+]] = select i1 %[[B_IS_NICHE]], i8 %[[B_REL_DISCR]], i8 1
+    // LLVM20: %[[B_DISCR:.+]] = select i1 %[[B_IS_NICHE]], i8 %[[B_REL_DISCR]], i8 1
+
+    // LLVM21: %[[A_DISCR:.+]] = select i1 %[[A_IS_NICHE]], i8 %a, i8 -127
+    // LLVM21: %[[B_DISCR:.+]] = select i1 %[[B_IS_NICHE]], i8 %b, i8 -127
 
     // CHECK: %[[R:.+]] = icmp eq i8 %[[A_DISCR]], %[[B_DISCR]]
     // CHECK: ret i1 %[[R]]
diff --git a/tests/codegen-llvm/enum/enum-transparent-extract.rs b/tests/codegen-llvm/enum/enum-transparent-extract.rs
new file mode 100644
index 00000000000..c5efb8d472b
--- /dev/null
+++ b/tests/codegen-llvm/enum/enum-transparent-extract.rs
@@ -0,0 +1,31 @@
+//@ compile-flags: -Copt-level=0
+//@ only-64bit
+
+#![crate_type = "lib"]
+
+use std::ops::ControlFlow;
+
+pub enum Never {}
+
+#[no_mangle]
+pub fn make_unmake_result_never(x: i32) -> i32 {
+    // CHECK-LABEL: define i32 @make_unmake_result_never(i32 %x)
+    // CHECK: start:
+    // CHECK-NEXT: ret i32 %x
+
+    let y: Result<i32, Never> = Ok(x);
+    let Ok(z) = y;
+    z
+}
+
+#[no_mangle]
+pub fn extract_control_flow_never(x: ControlFlow<&str, Never>) -> &str {
+    // CHECK-LABEL: define { ptr, i64 } @extract_control_flow_never(ptr align 1 %x.0, i64 %x.1)
+    // CHECK: start:
+    // CHECK-NEXT: %[[P0:.+]] = insertvalue { ptr, i64 } poison, ptr %x.0, 0
+    // CHECK-NEXT: %[[P1:.+]] = insertvalue { ptr, i64 } %[[P0]], i64 %x.1, 1
+    // CHECK-NEXT: ret { ptr, i64 } %[[P1]]
+
+    let ControlFlow::Break(s) = x;
+    s
+}