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AgeCommit message (Expand)AuthorLines
2025-09-10loongarch: Align intrinsic signatures with LLVMWANG Rui-7/+10
2025-07-25loongarch: Use unified data types for SIMD intrinsicsWANG Rui-4431/+4647
2025-07-18loongarch: Mark SIMD intrinsics without memory access as safeWANG Rui-2872/+2872
2025-07-18loongarch: Mark partial basic intrinsics as safeWANG Rui-8/+7
2025-06-28loongarch: Add basic support for LoongArch32WANG Rui-238/+1
2025-05-30Fix `ldpte` and `lddir` signaturesayantn-4/+6
2025-02-09Apply missing_unsafe_on_externEric Huss-3/+3
2024-12-23core_arch: Add LoongArch basic intrinsicsWANG Rui-0/+365
2024-10-14core_arch: Add LoongArch frecipe intrinsicsWANG Rui-12/+184
2024-08-08Keep `Debug` the sameScott McMurray-20/+4
2024-08-08Move entirely to array-based SIMDScott McMurray-36/+20
2024-03-20core_arch/loongarch64: Re-export SIMD typesWANG Rui-0/+8
2024-02-28core_arch: Add LoongArch LASX testcasesWANG Rui-0/+14694
2024-02-28core_arch: Add LoongArch LASX intrinsicsWANG Rui-0/+7100
2024-02-28core_arch: Add LoongArch LSX testcasesWANG Rui-0/+7136
2024-02-28core_arch: Add LoongArch LSX intrinsicsZHAI Xiang-0/+6903
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