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2020-06-21num_counters to u32, after implementing TypeFoldableRich Kadel-1/+1
2020-06-21Fix handling of reserved registers for ARM inline asmAmanieu d'Antras-0/+4
2020-06-21`icmp` can handle raw pointers just fine, there's no need to cast to int.Oliver Scherer-2/+0
2020-06-19Rollup merge of #73347 - tmiasko:incompatible-sanitizers, r=nikicManish Goregaokar-56/+46
Diagnose use of incompatible sanitizers Emit an error when incompatible sanitizer are configured through command line options. Previously the last one configured prevailed and others were silently ignored. Additionally use a set to represent configured sanitizers, making it possible to enable multiple sanitizers at once. At least in principle, since currently all of them are considered to be incompatible with others.
2020-06-19Rollup merge of #72689 - lcnr:common_str, r=estebankManish Goregaokar-1/+1
add str to common types I already expected this to be the case and it may slightly improve perf. Afaict if we ever want to change str into a lang item this would have to get reverted. As that would be fairly simple I don't believe this to cause any problems in the future.
2020-06-19code coverage foundation for hash and num_countersRich Kadel-23/+14
Replaced dummy values for hash and num_counters with computed values, and refactored InstrumentCoverage pass to simplify injecting more counters per function in upcoming versions. Improved usage documentation and error messaging.
2020-06-19Rollup merge of #73214 - androm3da:hex_inline_asm_00, r=AmanieuManish Goregaokar-0/+4
Add asm!() support for hexagon
2020-06-19Add fuzzy pointer comparison intrinsicsOliver Scherer-1/+13
2020-06-19Rollup merge of #73011 - richkadel:llvm-count-from-mir-pass, r=tmandryRalf Jung-0/+56
first stage of implementing LLVM code coverage This PR replaces #70680 (WIP toward LLVM Code Coverage for Rust) since I am re-implementing the Rust LLVM code coverage feature in a different part of the compiler (in MIR pass(es) vs AST). This PR updates rustc with `-Zinstrument-coverage` option that injects the llvm intrinsic `instrprof.increment()` for code generation. This initial version only injects counters at the top of each function, and does not yet implement the required coverage map. Upcoming PRs will add the coverage map, and add more counters and/or counter expressions for each conditional code branch. Rust compiler MCP https://github.com/rust-lang/compiler-team/issues/278 Relevant issue: #34701 - Implement support for LLVMs code coverage instrumentation ***[I put together some development notes here, under a separate branch.](https://github.com/richkadel/rust/blob/cfa0b21d34ee64e4ebee226101bd2ef0c6757865/src/test/codegen/coverage-experiments/README-THIS-IS-TEMPORARY.md)***
2020-06-19Rollup merge of #72497 - RalfJung:tag-term, r=oli-obkRalf Jung-55/+53
tag/niche terminology cleanup The term "discriminant" was used in two ways throughout the compiler: * every enum variant has a corresponding discriminant, that can be given explicitly with `Variant = N`. * that discriminant is then encoded in memory to store which variant is active -- but this encoded form of the discriminant was also often called "discriminant", even though it is conceptually quite different (e.g., it can be smaller in size, or even use niche-filling). After discussion with @eddyb, this renames the second term to "tag". The way the tag is encoded can be either `TagEncoding::Direct` (formerly `DiscriminantKind::Tag`) or `TagEncoding::Niche` (formerly `DiscrimianntKind::Niche`). This finally resolves some long-standing confusion I had about the handling of variant indices and discriminants, which surfaced in https://github.com/rust-lang/rust/pull/72419. (There is also a `DiscriminantKind` type in libcore, it remains unaffected. I think this corresponds to the discriminant, not the tag, so that seems all right.) r? @eddyb
2020-06-16Add initial asm!() support for hexagonBrian Cain-0/+4
GPRs only
2020-06-15moved instrument_coverage pass, optimized scalar, added FIXMERich Kadel-0/+5
2020-06-15[WIP] injects llvm intrinsic instrprof.increment for coverage reportsRich Kadel-0/+51
This initial version only injects counters at the top of each function. Rust Coverage will require injecting additional counters at each conditional code branch.
2020-06-15add FIXME to EnumTagInfoRalf Jung-0/+3
2020-06-14Diagnose use of incompatible sanitizersTomasz Miąsko-56/+46
Emit an error when incompatible sanitizer are configured through command line options. Previously the last one configured prevailed and others were silently ignored. Additionally use a set to represent configured sanitizers, making it possible to enable multiple sanitizers at once. At least in principle, since currently all of them are considered to be incompatible with others.
2020-06-12Auto merge of #69478 - avr-rust:avr-support-upstream, r=jonas-schievinkbors-0/+4
Enable AVR as a Tier 3 target upstream Tracking issue: #44052. Things intentionally left out of the initial upstream: * The `target_cpu` flag I have made the cleanup suggestions by @jplatte and @jplatte in https://github.com/avr-rust/rust/commit/043550d9db0582add42e5837f636f61acb26b915. Anybody feel free to give the branch a test and see how it fares, or make suggestions on the code patch itself.
2020-06-09Handle assembler warnings properlyAmanieu d'Antras-6/+41
2020-06-09[AVR] Add AVR platform supportJake Goulding-0/+4
2020-06-02Make things build againVadim Petrochenkov-1/+1
2020-06-01Auto merge of #71192 - oli-obk:eager_alloc_id_canonicalization, r=wesleywiserbors-0/+1
Make TLS accesses explicit in MIR r? @rust-lang/wg-mir-opt cc @RalfJung @vakaras for miri thread locals cc @bjorn3 for cranelift fixes #70685
2020-05-30Rollup merge of #72666 - ivanloz:profile_emit_flag, r=matthewjasperRalf Jung-4/+4
Add -Z profile-emit=<path> for Gcov gcda output. Adds a -Z flag to control the file path that the Gcov gcda output is written to during runtime. This flag expects a path and filename, e.g. -Z profile-emit=gcov/out/lib.gcda. This works similar to GCC/Clang's -fprofile-dir flag which allows control over the output path for gcda coverage files.
2020-05-30Rollup merge of #72625 - Amanieu:asm-srcloc, r=petrochenkovRalf Jung-17/+75
Improve inline asm error diagnostics Previously we were just using the raw LLVM error output (with line, caret, etc) as the diagnostic message, which ends up looking rather out of place with our existing diagnostics. The new diagnostics properly format the diagnostics and also take advantage of LLVM's per-line `srcloc` attribute to map an error in inline assembly directly to the relevant line of source code. Incidentally also fixes #71639 by disabling `srcloc` metadata during LTO builds since we don't know what crate it might have come from. We can only resolve `srcloc`s from the currently crate since it indexes into the source map for the current crate. Fixes #72664 Fixes #71639 r? @petrochenkov ### Old style ```rust #![feature(llvm_asm)] fn main() { unsafe { let _x: i32; llvm_asm!( "mov $0, $1 invalid_instruction $0, $1 mov $0, $1" : "=&r" (_x) : "r" (0) :: "intel" ); } } ``` ``` error: <inline asm>:3:14: error: invalid instruction mnemonic 'invalid_instruction' invalid_instruction ecx, eax ^~~~~~~~~~~~~~~~~~~ --> src/main.rs:6:9 | 6 | / llvm_asm!( 7 | | "mov $0, $1 8 | | invalid_instruction $0, $1 9 | | mov $0, $1" ... | 12 | | :: "intel" 13 | | ); | |__________^ ``` ### New style ```rust #![feature(asm)] fn main() { unsafe { asm!( "mov {0}, {1} invalid_instruction {0}, {1} mov {0}, {1}", out(reg) _, in(reg) 0i64, ); } } ``` ``` error: invalid instruction mnemonic 'invalid_instruction' --> test.rs:7:14 | 7 | invalid_instruction {0}, {1} | ^ | note: instantiated into assembly here --> <inline asm>:3:14 | 3 | invalid_instruction rax, rcx | ^^^^^^^^^^^^^^^^^^^ ```
2020-05-30tag/niche terminology cleanupRalf Jung-55/+50
2020-05-30Make TLS accesses explicit in MIROliver Scherer-0/+1
2020-05-29Improve inline asm error diagnosticsAmanieu d'Antras-17/+75
2020-05-28add str to common typesBastian Kauschke-1/+1
2020-05-27Add -Z profile-emit=<path> for Gcov gcda output.Ivan Lozano-4/+4
Adds a -Z flag to control the file path that the Gcov gcda output is written to during runtime. This flag expects a path and filename, e.g. -Z profile-emit=gcov/out/lib.gcda. This works similar to GCC/Clang's -fprofile-dir flag which allows control over the output path for gcda coverage files.
2020-05-27Omit DW_AT_linkage_name when it is the same as DW_AT_nameTomasz Miąsko-12/+6
The DWARF standard suggests that it might be useful to include `DW_AT_linkage_name` when it is *distinct* from the identifier name.
2020-05-24Minor fixes, as requested in PR reviewMichal Sudwoj-4/+0
2020-05-24NVPTX support for new asm!Michal Sudwoj-0/+12
2020-05-22Use `OnceCell` instead of `Once`Dylan MacKenzie-1/+1
2020-05-22Rollup merge of #72435 - petrochenkov:cratetypesopt, r=Mark-SimulacrumRalf Jung-41/+9
rustllvm: Fix warnings about unused function parameters And then perform corresponding cleanups on Rust side. Fixes https://github.com/rust-lang/rust/issues/72427
2020-05-22Rollup merge of #72376 - wesleywiser:record_cgu_name, r=Mark-SimulacrumRalf Jung-1/+1
[self-profling] Record the cgu name when doing codegen for a module
2020-05-22Rollup merge of #72438 - vertexclique:vcq/aarch64-tme-features, r=AmanieuRalf Jung-0/+1
Enable ARM TME (Transactional Memory Extensions) Enables ARM TME coming up with LLVM 10. Related ARM TME intrinsics are included by the merge of #67900. Enables: https://github.com/rust-lang/stdarch/pull/855
2020-05-22Rollup merge of #72309 - petrochenkov:linkunspec, r=matthewjasperRalf Jung-2/+2
Some renaming and minor refactoring for `NativeLibraryKind`
2020-05-21Enable ARM TME (Transactional Memory Extensions)Mahmut Bulut-0/+1
2020-05-21rustllvm: Fix warnings about unused function parametersVadim Petrochenkov-41/+9
2020-05-21Auto merge of #71718 - NeoRaider:ffi_const_pure, r=Amanieubors-0/+6
Experimentally add `ffi_const` and `ffi_pure` extern fn attributes Add FFI function attributes corresponding to clang/gcc/... `const` and `pure`. Rebased version of #58327 by @gnzlbg with the following changes: - Switched back from the `c_ffi_const` and `c_ffi_pure` naming to `ffi_const` and `ffi_pure`, as I agree with https://github.com/rust-lang/rust/pull/58327#issuecomment-462718772 and this nicely aligns with `ffi_returns_twice` - (Hopefully) took care of all of @hanna-kruppe's change requests in the original PR r? @hanna-kruppe
2020-05-21Rollup merge of #72397 - petrochenkov:tiny, r=AmanieuRalf Jung-1/+1
llvm: Expose tiny code model to users This model is relevant to embedded AArch64 targets and was added to LLVM relatively recently (https://reviews.llvm.org/D49673, mid 2018), so rustc frontend didn't provide access to it with `-C code-model`. The gcc analogue is [`-mcmodel=tiny`](https://gcc.gnu.org/onlinedocs/gcc/AArch64-Options.html). (This is one of the options that are passed directly to LLVM without being interpreted by rustc.) Follow up to https://github.com/rust-lang/rust/pull/72248.
2020-05-21Auto merge of #70705 - lcnr:generic_discriminant, r=nikomatsakisbors-3/+9
Use `T`'s discriminant type in `mem::Discriminant<T>` instead of `u64`. fixes #70509 Adds the lang-item `discriminant_kind`. Updates the function signature of `intrinsics::discriminant_value`. Adds the *probably permanently unstable* trait `DiscriminantKind`. `mem::Discriminant` should now be smaller in some cases. r? @ghost
2020-05-20llvm: Expose tiny code model to usersVadim Petrochenkov-1/+1
2020-05-20Rename some types describing native librariesVadim Petrochenkov-2/+2
NativeLibrary(Kind) -> NativeLib(Kind) NativeStatic -> StaticBundle NativeStaticNobundle -> StaticNoBundle NativeFramework -> Framework NativeRawDylib -> RawDylib NativeUnknown -> Unspecified
2020-05-20[self-profling] Record the cgu name when doing codegen for a moduleWesley Wiser-1/+1
2020-05-20Implement `#[ffi_const]` and `#[ffi_pure]` function attributesMatthias Schiffer-0/+6
Introduce function attribute corresponding to the `const`/`pure` attributes supported by GCC, clang and other compilers. Based on the work of gnzlbg <gonzalobg88@gmail.com>.
2020-05-19update codegen of `discriminant_value`Bastian Kauschke-3/+9
2020-05-18Move InlineAsmTemplatePiece and InlineAsmOptions to librustc_astAmanieu d'Antras-0/+1
2020-05-18Implement att_syntax optionAmanieu d'Antras-1/+5
2020-05-18Work around more LLVM limitationsAmanieu d'Antras-1/+76
2020-05-18Add support for high byte registers on x86Amanieu d'Antras-0/+3
2020-05-18Implement asm! codegenAmanieu d'Antras-15/+465