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2023-01-11Move /src/test to /testsAlbert Larsan-2240/+0
2023-01-01Verbose suggestionsEsteban Küber-15/+11
2022-12-29Account for multiple multiline spans with empty paddingEsteban Küber-6/+1
Instead of ``` LL | fn oom( | __^ | | _| | || LL | || ) { | ||_- LL | | } | |__^ ``` emit ``` LL | // fn oom( LL | || ) { | ||_- LL | | } | |__^ ```
2022-11-02asm: Work around LLVM bug on AArch64Amanieu d'Antras-0/+16
Upstream issue: https://github.com/llvm/llvm-project/issues/58384 LLVM gets confused if we assign a 32-bit value to a 64-bit register, so pass the 32-bit register name to LLVM in that case.
2022-10-17Stabilize asm_symAmanieu d'Antras-5/+5
2022-10-01bless ui testsMaybe Waffle-1/+1
2022-09-26fix #102087, Suggest Default::default() when binding isn't initializedyukang-0/+10
2022-09-08fix the suggestion of format for asm_sub_registerYiming Lei-20/+20
modified: compiler/rustc_typeck/src/check/intrinsicck.rs modified: src/test/ui/asm/bad-template.aarch64_mirunsafeck.stderr modified: src/test/ui/asm/bad-template.aarch64_thirunsafeck.stderr modified: src/test/ui/asm/bad-template.x86_64_mirunsafeck.stderr modified: src/test/ui/asm/bad-template.x86_64_thirunsafeck.stderr modified: src/test/ui/asm/type-check-1.rs modified: src/test/ui/asm/type-check-1.stderr modified: src/test/ui/asm/x86_64/type-check-3.stderr
2022-08-14Update the minimum external LLVM to 13Josh Stone-1/+0
2022-08-02Properly reject the `may_unwind` option in `global_asm!`Amanieu d'Antras-18/+18
This was accidentally accepted even though it had no effect in `global_asm!`. The option only makes sense for `asm!` which runs within a function.
2022-07-14Rollup merge of #99192 - Amanieu:fix-asm-srcloc, r=petrochenkovDylan DPC-1/+20
Fix spans for asm diagnostics Line spans were incorrect if the first line of an asm statement was an empty string.
2022-07-14Fix spans for asm diagnosticsAmanieu d'Antras-1/+20
Line spans were incorrect if the first line of an asm statement was an empty string.
2022-07-08Auto merge of #98482 - cjgillot:short-struct-span-closure, r=estebankbors-1/+1
Shorten def_span of closures to just their header Continuation of https://github.com/rust-lang/rust/pull/93967.
2022-07-07fix arm testEsteban Küber-6/+10
2022-07-07Bless aarch64 test.Camille GILLOT-1/+1
2022-05-27Update tests on aarch64Oli Scherer-127/+183
2022-04-16Update tests for sym support in global_asm!Amanieu d'Antras-25/+36
2022-03-23Rollup merge of #91608 - workingjubilee:fold-neon-fp, r=nagisa,AmanieuDylan DPC-1/+1
Fold aarch64 feature +fp into +neon Arm's FEAT_FP and Feat_AdvSIMD describe the same thing on AArch64: The Neon unit, which handles both floating point and SIMD instructions. Moreover, a configuration for AArch64 must include both or neither. Arm says "entirely proprietary" toolchains may omit floating point: https://developer.arm.com/documentation/102374/0101/Data-processing---floating-point In the Programmer's Guide for Armv8-A, Arm says AArch64 can have both FP and Neon or neither in custom implementations: https://developer.arm.com/documentation/den0024/a/AArch64-Floating-point-and-NEON In "Bare metal boot code for Armv8-A", enabling Neon and FP is just disabling the same trap flag: https://developer.arm.com/documentation/dai0527/a In an unlikely future where "Neon and FP" become unrelated, we can add "[+-]fp" as its own feature flag. Until then, we can simplify programming with Rust on AArch64 by folding both into "[+-]neon", which is valid as it supersets both. "[+-]neon" is retained for niche uses such as firmware, kernels, "I just hate floats", and so on. I am... pretty sure no one is relying on this. An argument could be made that, as we are not an "entirely proprietary" toolchain, we should not support AArch64 without floats at all. I think that's a bit excessive. However, I want to recognize the intent: programming for AArch64 should be simplified where possible. For x86-64, programmers regularly set up illegal feature configurations because it's hard to understand them, see https://github.com/rust-lang/rust/issues/89586. And per the above notes, plus the discussion in https://github.com/rust-lang/rust/issues/86941, there should be no real use cases for leaving these features split: the two should in fact always go together. - Fixes rust-lang/rust#95002. - Fixes rust-lang/rust#95064. - Fixes rust-lang/rust#95122.
2022-03-22Fold aarch64 feature +fp into +neonJubilee Young-1/+1
Arm's FEAT_FP and Feat_AdvSIMD describe the same thing on AArch64: The Neon unit, which handles both floating point and SIMD instructions. Moreover, a configuration for AArch64 must include both or neither. Arm says "entirely proprietary" toolchains may omit floating point: https://developer.arm.com/documentation/102374/0101/Data-processing---floating-point In the Programmer's Guide for Armv8-A, Arm says AArch64 can have both FP and Neon or neither in custom implementations: https://developer.arm.com/documentation/den0024/a/AArch64-Floating-point-and-NEON In "Bare metal boot code for Armv8-A", enabling Neon and FP is just disabling the same trap flag: https://developer.arm.com/documentation/dai0527/a In an unlikely future where "Neon and FP" become unrelated, we can add "[+-]fp" as its own feature flag. Until then, we can simplify programming with Rust on AArch64 by folding both into "[+-]neon", which is valid as it supersets both. "[+-]neon" is retained for niche uses such as firmware, kernels, "I just hate floats", and so on.
2022-03-21Add needs-asm-support directive to tests where necessarybjorn3-33/+38
2022-01-31Update test output for `ui/asm/aarch64/parse-error.rs`Fabian Wolff-7/+7
2021-12-12Re-bless asm tests for aarch64Amanieu d'Antras-142/+144
2021-12-12Stabilize asm! and global_asm!Amanieu d'Antras-15/+26
They are also removed from the prelude as per the decision in https://github.com/rust-lang/rust/issues/87228. stdarch and compiler-builtins are updated to work with the new, stable asm! and global_asm! macros.
2021-12-11Fix AArch64 asm ui testsAmanieu d'Antras-19/+11
2021-12-03fix inline asm test by not hardcoding symbol namescynecx-3/+9
2021-12-03add clobber_abi("C") to may_unwind inline-asm testscynecx-1/+1
2021-12-03add tests for asm's options(may_unwind)cynecx-0/+31
2021-12-03Add initial AST and MIR support for unwinding from inline assemblyAmanieu d'Antras-22/+22
2021-11-12fix aarch test error annotationsasquared31415-4/+4
2021-11-10Fix aarch testsasquared31415-60/+51
2021-11-10Add support for specifying multiple clobber_abi in `asm!`asquared31415-57/+46
Allow multiple clobber_abi in asm Update docs Fix aarch64 test Combine abis Emit duplicate ABI error, empty ABI list error multiple clobber_abi
2021-11-07Add features gates for experimental asm featuresAmanieu d'Antras-28/+29
2021-10-23bless the line changes in ui/asm/aarch64/srcloc.rsJosh Stone-23/+23
2021-10-22Update the minimum external LLVM to 11Josh Stone-3/+0
2021-10-16Auto merge of #89860 - camsteffen:macro-semi, r=petrochenkovbors-11/+11
Remove trailing semicolon from macro call span Macro call site spans are now less surprising/more consistent since they no longer contain a semicolon after the macro call. The downside is that we need to do a little guesswork to get the semicolon in diagnostics. But this should not be noticeable since it is rare for the semicolon to not immediately follow the macro call.
2021-10-15Bless testsCameron Steffen-11/+11
2021-10-14Use non-checking TLS relocation in aarch64 asm! sym test.Adam Gemmell-1/+1
The checking variant ensures that the offset required is not larger than 12 bits - hence we wouldn't ever need the upper 12 bits.
2021-09-24Disable some tests for platforms without registers.Adam Gemmell-25/+49
Update new tests to run on aarch64 platforms.
2021-09-24Add inline asm! tests for aarch64Adam Gemmell-0/+2085
Enable tests which are largely architecture-independent on all supported platforms