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2025-07-22Rename `tests/assembly` into `tests/assembly-llvm`Guillaume Gomez-5491/+0
2025-06-14Add `f16` inline asm support for LoongArchWANG Rui-1/+25
2025-05-17aarch64-linux: Default to FramePointer::NonLeafJubilee Young-4/+3
For aarch64-apple and aarch64-windows, platform docs state that code must use frame pointers correctly. This is because the AAPCS64 mandates that a platform specify its frame pointer conformance requirements: - Apple: https://developer.apple.com/documentation/xcode/writing-arm64-code-for-apple-platforms#Respect-the-purpose-of-specific-CPU-registers - Windows: https://learn.microsoft.com/en-us/cpp/build/arm64-windows-abi-conventions?view=msvc-170#integer-registers - AAPCS64: https://github.com/ARM-software/abi-aa/blob/4492d1570eb70c8fd146623e0db65b2d241f12e7/aapcs64/aapcs64.rst#the-frame-pointer Unwinding code either requires unwind tables or frame pointers, and on aarch64 the expectation is that one can use frame pointers for this. Most Linux targets represent a motley variety of possible distributions, so it is unclear who to defer to on conformance, other than perhaps Arm. In the absence of a specific edict for a given aarch64-linux target, Rust will assume aarch64-linux targets use non-leaf frame pointers. This reflects what compilers like clang do.
2025-05-09Enable non-leaf Frame Pointers for Arm64EC WindowsDaniel Paoliello-2/+4
2025-02-19Create a generic AVR target: avr-nonePatryk Wychowaniec-2/+2
This commit removes the `avr-unknown-gnu-atmega328` target and replaces it with a more generic `avr-none` variant that must be specialized with the `-C target-cpu` flag (e.g. `-C target-cpu=atmega328p`).
2025-02-16use add-core-stubs / minicore for a few more testsRalf Jung-8/+0
2025-02-08tests/assembly: use -Copt-level=3 instead of -OJubilee Young-7/+7
2024-12-18tests/assembly/asm: Remove uses of rustc_attrs and lang_items features by ↵Taiki Endo-487/+88
using minicore
2024-11-29Support floats in input/output in vector registers of PowerPC inline assemblyTaiki Endo-0/+66
2024-11-29Support #[repr(simd)] types in input/output of PowerPC inline assemblyTaiki Endo-2/+235
2024-11-24Make s390x non-clobber-only vector register support unstableTaiki Endo-0/+1
2024-11-22Support input/output in vector registers of s390x inline assemblyTaiki Endo-3/+195
2024-11-10Stabilize Arm64EC inline assemblyTaiki Endo-1/+1
2024-11-08Stabilize s390x inline assemblyTaiki Endo-1/+1
2024-11-07Basic inline assembly support for SPARC and SPARC64Taiki Endo-0/+168
2024-11-02Rollup merge of #132457 - taiki-e:needless-feature, r=workingjubileeMatthias Krüger-1/+1
Remove needless #![feature(asm_experimental_arch)] from loongarch64 inline assembly test inline assembly is already stable on this architecture.
2024-11-01Remove needless #![feature(asm_experimental_arch)] from loongarch64 inline ↵Taiki Endo-1/+1
assembly test
2024-11-01Move remaining inline assembly test files into asm directoryTaiki Endo-0/+12
2024-09-09Ban non-array SIMDScott McMurray-212/+60
2024-08-31[testsuite][cleanup] Remove all usages of `dont_merge` hack to avoid ↵Rajveer-126/+12
function merging Resolves #129438 The `-Zmerge-functions=disabled` compile flag exists for this purpose.
2024-08-25Add `f16` and `f128` inline ASM support for `aarch64`beetrees-27/+106
2024-08-24Enable f16 in assembly on aarch64 platforms that support itrongfu.leng-1/+28
Signed-off-by: rongfu.leng <lenronfu@gmail.com>
2024-08-13stabilize `asm_const`Folkert-2/+1
2024-07-29Reformat `use` declarations.Nicholas Nethercote-1/+2
The previous commit updated `rustfmt.toml` appropriately. This commit is the outcome of running `x fmt --all` with the new formatting options.
2024-06-22Rollup merge of #126555 - beetrees:f16-inline-asm-arm, r=AmanieuGuillaume Gomez-178/+319
Add `f16` inline ASM support for 32-bit ARM Adds `f16` inline ASM support for 32-bit ARM. SIMD vector types are taken from [here](https://developer.arm.com/architectures/instruction-sets/intrinsics/#f:`@navigationhierarchiesreturnbasetype=[float]&f:@navigationhierarchieselementbitsize=[16]&f:@navigationhierarchiesarchitectures=[A32]).` Relevant issue: #125398 Tracking issue: #116909 `@rustbot` label +F-f16_and_f128
2024-06-21Rollup merge of #126530 - beetrees:f16-inline-asm-riscv, r=AmanieuJubilee-2/+53
Add `f16` inline ASM support for RISC-V This PR adds `f16` inline ASM support for RISC-V. A `FIXME` is left for `f128` support as LLVM does not support the required `Q` (Quad-Precision Floating-Point) extension yet. Relevant issue: #125398 Tracking issue: #116909 `@rustbot` label +F-f16_and_f128
2024-06-21Add `f16` inline ASM support for RISC-Vbeetrees-2/+53
2024-06-21Add `f16` inline ASM support for 32-bit ARMbeetrees-178/+319
2024-06-19Remove c_unwind from tests and fix testsGary Guo-3/+3
2024-06-13Add `f16` and `f128` inline ASM support for `x86` and `x86-64`beetrees-26/+218
2024-06-04Use FileCheck to parameterize codegen tests over hashesJubilee Young-2/+2
When things like our internal hashing or representations change, it is inappropriate for these tests to suddenly fail for no reason. The chance of error is reduced if we instead pattern-match.
2024-05-30Run rustfmt on `tests/assembly/`.Nicholas Nethercote-1/+1
2024-04-10Add support for Arm64EC inline assemblyDaniel Paoliello-76/+79
2024-02-22[AUTO_GENERATED] Migrate compiletest to use `ui_test`-style `//@` directives许杰友 Jieyou Xu (Joe)-104/+104
2024-01-03Support reg_addr register class in s390x inline assemblyTaiki Endo-0/+24
2023-11-21Update the minimum external LLVM to 16.Dario Nieuwenhuis-2/+1
2023-10-17Automatically enable cross-crate inlining for small functionsBen Kimock-0/+1
2023-05-29Fix linkage for large binaries on mips64 platforms ...Ximin Luo-4/+8
... by enabling xgot feature Co-Authored-By: Zixing Liu <zixing.liu@canonical.com>
2023-04-25Add loongarch64 asm! supportzhaixiaojuan-0/+196
2023-04-23allow array-style simd in inline asmEzra Shaw-0/+25
2023-04-12Add inline assembly support for m68kIan Douglas Scott-0/+83
2023-04-05Fix an assembly test with a hard-coded hashThom Chiovoloni-2/+2
2023-01-11Move /src/test to /testsAlbert Larsan-0/+4642