summary refs log tree commit diff
path: root/src/etc/platform-intrinsics/powerpc.json
blob: acb6813887c5cba389efe5b0dae0ab8dbe804396 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
{
    "platform": "powerpc",
    "intrinsic_prefix": "_vec_",
    "llvm_prefix": "llvm.ppc.altivec.",
    "number_info": {
        "unsigned": {
            "kind" : "u",
            "data_type_short": { "8": "b", "16": "h", "32": "w", "64": "d" }
        },
        "signed": {
            "kind" : "s",
            "data_type_short": { "8": "b", "16": "h", "32": "w", "64": "d" }
        },
        "float": {}
    },
    "width_info": {
        "128": { "width": "" }
    },
    "intrinsics": [
        {
            "intrinsic": "perm",
            "width": [128],
            "llvm": "vperm",
            "ret": "s32",
            "args": ["0", "0", "s8"]
        },
        {
            "intrinsic": "mradds",
            "width": [128],
            "llvm": "vmhraddshs",
            "ret": "s16",
            "args": ["0", "0", "0"]
        },
        {
            "intrinsic": "cmpb",
            "width": [128],
            "llvm": "vcmpbfp",
            "ret": "s32",
            "args": ["f32", "f32"]
        },
        {
            "intrinsic": "cmpeq{0.data_type_short}",
            "width": [128],
            "llvm": "vcmpequ{0.data_type_short}",
            "ret": "s(8-32)",
            "args": ["0", "0"]
        },
        {
            "intrinsic": "cmpgt{1.kind}{1.data_type_short}",
            "width": [128],
            "llvm": "vcmpgt{1.kind}{1.data_type_short}",
            "ret": "s(8-32)",
            "args": ["0u", "1"]
        },
        {
            "intrinsic": "cmpgt{1.kind}{1.data_type_short}",
            "width": [128],
            "llvm": "vcmpgt{1.kind}{1.data_type_short}",
            "ret": "s(8-32)",
            "args": ["0", "1"]
        },
        {
            "intrinsic": "max{0.kind}{0.data_type_short}",
            "width": [128],
            "llvm": "vmax{0.kind}{0.data_type_short}",
            "ret": "i(8-32)",
            "args": ["0", "0"]
        },
        {
            "intrinsic": "min{0.kind}{0.data_type_short}",
            "width": [128],
            "llvm": "vmin{0.kind}{0.data_type_short}",
            "ret": "i(8-32)",
            "args": ["0", "0"]
        },
        {
            "intrinsic": "sub{0.kind}{0.data_type_short}s",
            "width": [128],
            "llvm": "vsub{0.kind}{0.data_type_short}s",
            "ret": "i(8-32)",
            "args": ["0", "0"]
        },
        {
            "intrinsic": "subc",
            "width": [128],
            "llvm": "vsubcuw",
            "ret": "u32",
            "args": ["0", "0"]
        },
        {
            "intrinsic": "add{0.kind}{0.data_type_short}s",
            "width": [128],
            "llvm": "vadd{0.kind}{0.data_type_short}s",
            "ret": "i(8-32)",
            "args": ["0", "0"]
        },
        {
            "intrinsic": "addc",
            "width": [128],
            "llvm": "vaddcuw",
            "ret": "u32",
            "args": ["0", "0"]
        },
        {
            "intrinsic": "mule{1.kind}{1.data_type_short}",
            "width": [128],
            "llvm": "vmule{0.kind}{1.data_type_short}",
            "ret": "i(16-32)",
            "args": ["0N", "1"]
        },
        {
            "intrinsic": "mulo{1.kind}{1.data_type_short}",
            "width": [128],
            "llvm": "vmulo{0.kind}{1.data_type_short}",
            "ret": "i(16-32)",
            "args": ["0N", "1"]
        },
        {
            "intrinsic": "avg{0.kind}{0.data_type_short}",
            "width": [128],
            "llvm": "vavg{0.kind}{0.data_type_short}",
            "ret": "i(8-32)",
            "args": ["0", "0"]
        },
        {
            "intrinsic": "packs{0.kind}{1.data_type_short}",
            "width": [128],
            "llvm": "vpk{0.kind}{1.data_type_short}{0.kind}s",
            "ret": "i(8-16)",
            "args": ["0W", "1"]
        },
        {
            "intrinsic": "packsu{1.kind}{1.data_type_short}",
            "width": [128],
            "llvm": "vpk{1.kind}{1.data_type_short}{0.kind}s",
            "ret": "u(8-16)",
            "args": ["0Ws", "1"]
        },
        {
            "intrinsic": "packpx",
            "width": [128],
            "llvm": "vpkpx",
            "ret": "s16",
            "args": ["s32", "s32"]
        },
        {
            "intrinsic": "unpackl{1.kind}{1.data_type_short}",
            "width": [128],
            "llvm": "vupkl{1.kind}{1.data_type_short}",
            "ret": "s(16-32)",
            "args": ["0N"]
        },
        {
            "intrinsic": "unpackh{1.kind}{1.data_type_short}",
            "width": [128],
            "llvm": "vupkh{1.kind}{1.data_type_short}",
            "ret": "s(16-32)",
            "args": ["0N"]
        },
        {
            "intrinsic": "madds",
            "width": [128],
            "llvm": "vmhaddshs",
            "ret": "s16",
            "args": ["0", "0", "0"]
        },
        {
            "intrinsic": "msumu{1.data_type_short}m",
            "width": [128],
            "llvm": "vmsumu{1.data_type_short}m",
            "ret": "u32",
            "args": ["u(8-16)", "1", "u32"]
        },
        {
            "intrinsic": "msummbm",
            "width": [128],
            "llvm": "vmsummbm",
            "ret": "s32",
            "args": ["s8", "u8", "s32"]
        },
        {
            "intrinsic": "msumshm",
            "width": [128],
            "llvm": "vmsumshm",
            "ret": "s32",
            "args": ["s16", "s16", "s32"]
        },
        {
            "intrinsic": "msum{0.kind}hs",
            "width": [128],
            "llvm": "vmsum{0.kind}hs",
            "ret": "i32",
            "args": ["0N", "0N", "0"]
        },
        {
            "intrinsic": "sum2s",
            "width": [128],
            "llvm": "vsum2sws",
            "ret": "s32",
            "args": ["0", "0"]
        },
        {
            "intrinsic": "sum4{0.kind}bs",
            "width": [128],
            "llvm": "vsum4{0.kind}bs",
            "ret": "i32",
            "args": ["0NN", "0"]
        },
        {
            "intrinsic": "sum4shs",
            "width": [128],
            "llvm": "vsum4shs",
            "ret": "s32",
            "args": ["0N", "0"]
        },
        {
            "intrinsic": "sums",
            "width": [128],
            "llvm": "vsumsws",
            "ret": "s32",
            "args": ["0", "0"]
        },
        {
            "intrinsic": "madd",
            "width": [128],
            "llvm": "vmaddfp",
            "ret": "f32",
            "args": ["0", "0", "0"]
        },
        {
            "intrinsic": "nmsub",
            "width": [128],
            "llvm": "vnmsubfp",
            "ret": "f32",
            "args": ["0", "0", "0"]
        },
        {
            "intrinsic": "expte",
            "width": [128],
            "llvm": "vexptefp",
            "ret": "f32",
            "args": ["0"]
        },
        {
            "intrinsic": "floor",
            "width": [128],
            "llvm": "vrfim",
            "ret": "f32",
            "args": ["0"]
        },
        {
            "intrinsic": "ceil",
            "width": [128],
            "llvm": "vrfip",
            "ret": "f32",
            "args": ["0"]
        },
        {
            "intrinsic": "round",
            "width": [128],
            "llvm": "vrfin",
            "ret": "f32",
            "args": ["0"]
        },
        {
            "intrinsic": "trunc",
            "width": [128],
            "llvm": "vrfiz",
            "ret": "f32",
            "args": ["0"]
        },
        {
            "intrinsic": "loge",
            "width": [128],
            "llvm": "vlogefp",
            "ret": "f32",
            "args": ["0"]
        },
        {
            "intrinsic": "re",
            "width": [128],
            "llvm": "vrefp",
            "ret": "f32",
            "args": ["0"]
        },
        {
            "intrinsic": "rsqrte",
            "width": [128],
            "llvm": "vrsqrtefp",
            "ret": "f32",
            "args": ["0"]
        }
    ]
}