blob: 7678c92a1f0c68fec2cd0b902e607f549c4400e0 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
|
// MIR for `demo_le_total` after PreCodegen
fn demo_le_total(_1: &(u16, i16), _2: &(u16, i16)) -> bool {
debug a => _1;
debug b => _2;
let mut _0: bool;
scope 1 (inlined std::cmp::impls::<impl PartialOrd for &(u16, i16)>::le) {
scope 2 (inlined core::tuple::<impl PartialOrd for (u16, i16)>::le) {
let mut _7: std::ops::ControlFlow<bool>;
scope 3 {
}
scope 4 (inlined std::cmp::impls::<impl PartialOrd for u16>::__chaining_le) {
let mut _3: u16;
let mut _4: u16;
let mut _5: bool;
let mut _6: bool;
scope 5 {
}
}
scope 6 (inlined std::cmp::impls::<impl PartialOrd for i16>::le) {
let mut _8: i16;
let mut _9: i16;
}
}
}
bb0: {
StorageLive(_7);
StorageLive(_3);
StorageLive(_4);
_3 = copy ((*_1).0: u16);
_4 = copy ((*_2).0: u16);
StorageLive(_5);
_5 = Eq(copy _3, copy _4);
switchInt(move _5) -> [0: bb1, otherwise: bb2];
}
bb1: {
StorageLive(_6);
_6 = Le(copy _3, copy _4);
_7 = ControlFlow::<bool>::Break(move _6);
StorageDead(_6);
StorageDead(_5);
StorageDead(_4);
StorageDead(_3);
_0 = copy ((_7 as Break).0: bool);
goto -> bb3;
}
bb2: {
StorageDead(_5);
StorageDead(_4);
StorageDead(_3);
StorageLive(_8);
_8 = copy ((*_1).1: i16);
StorageLive(_9);
_9 = copy ((*_2).1: i16);
_0 = Le(move _8, move _9);
StorageDead(_9);
StorageDead(_8);
goto -> bb3;
}
bb3: {
StorageDead(_7);
return;
}
}
|
