index
:
rust
this commit
auto
automation/bors/try
automation/bors/try-merge
beta
cargo_update
lcnr/rustc-dev-guide
master
perf-tmp
stable
try
try-perf
https://github.com/rust-lang/rust
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
tests
/
mir-opt
/
pre-codegen
Mode
Name
Size
-rw-r--r--
README.md
237
log
plain
-rw-r--r--
duplicate_switch_targets.rs
415
log
plain
-rw-r--r--
duplicate_switch_targets.ub_if_b.PreCodegen.after.mir
1216
log
plain
-rw-r--r--
intrinsics.f_u64.PreCodegen.after.mir
1371
log
plain
-rw-r--r--
intrinsics.f_unit.PreCodegen.after.mir
1014
log
plain
-rw-r--r--
intrinsics.rs
680
log
plain
-rw-r--r--
mem_replace.manual_replace.PreCodegen.after.mir
773
log
plain
-rw-r--r--
mem_replace.mem_replace.PreCodegen.after.mir
3486
log
plain
-rw-r--r--
mem_replace.rs
400
log
plain
-rw-r--r--
optimizes_into_variable.main.ConstProp.32bit.diff
4555
log
plain
-rw-r--r--
optimizes_into_variable.main.ConstProp.64bit.diff
4555
log
plain
-rw-r--r--
optimizes_into_variable.main.PreCodegen.after.32bit.mir
678
log
plain
-rw-r--r--
optimizes_into_variable.main.PreCodegen.after.64bit.mir
678
log
plain
-rw-r--r--
optimizes_into_variable.main.ScalarReplacementOfAggregates.32bit.diff
5676
log
plain
-rw-r--r--
optimizes_into_variable.main.ScalarReplacementOfAggregates.64bit.diff
5676
log
plain
-rw-r--r--
optimizes_into_variable.main.SimplifyLocals-final.after.32bit.mir
688
log
plain
-rw-r--r--
optimizes_into_variable.main.SimplifyLocals-final.after.64bit.mir
688
log
plain
-rw-r--r--
optimizes_into_variable.rs
541
log
plain
-rw-r--r--
range_iter.forward_loop.PreCodegen.after.mir
5391
log
plain
-rw-r--r--
range_iter.inclusive_loop.PreCodegen.after.mir
5753
log
plain
-rw-r--r--
range_iter.range_inclusive_iter_next.PreCodegen.after.mir
1264
log
plain
-rw-r--r--
range_iter.range_iter_next.PreCodegen.after.mir
1223
log
plain
-rw-r--r--
range_iter.rs
790
log
plain
-rw-r--r--
simple_option_map.ezmap.PreCodegen.after.mir
3469
log
plain
-rw-r--r--
simple_option_map.rs
440
log
plain
-rw-r--r--
slice_index.rs
821
log
plain
-rw-r--r--
slice_index.slice_get_mut_usize.PreCodegen.after.mir
7888
log
plain
-rw-r--r--
slice_index.slice_get_unchecked_mut_range.PreCodegen.after.mir
11385
log
plain
-rw-r--r--
slice_index.slice_index_range.PreCodegen.after.mir
1810
log
plain
-rw-r--r--
slice_index.slice_index_usize.PreCodegen.after.mir
1105
log
plain
-rw-r--r--
slice_iter.forward_loop.PreCodegen.after.mir
14047
log
plain
-rw-r--r--
slice_iter.reverse_loop.PreCodegen.after.mir
15680
log
plain
-rw-r--r--
slice_iter.rs
1316
log
plain
-rw-r--r--
slice_iter.slice_iter_mut_next_back.PreCodegen.after.mir
993
log
plain
-rw-r--r--
slice_iter.slice_iter_next.PreCodegen.after.mir
920
log
plain
-rw-r--r--
try_identity.new.PreCodegen.after.mir
3458
log
plain
-rw-r--r--
try_identity.old.PreCodegen.after.mir
1776
log
plain
-rw-r--r--
try_identity.rs
906
log
plain