blob: 4e8e25eb736742e6c59e84854727a51a5296f161 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
|
//@ check-pass
//@ compile-flags: -Zinput-stats
//@ only-64bit
//@ needs-asm-support
// layout randomization affects the hir stat output
//@ needs-deterministic-layouts
//
// Filter out the percentages because a change to a single count can affect
// many or all percentages, which makes the diffs hard to read.
//@ normalize-stderr: "\([0-9 ][0-9]\.[0-9]%\)" -> "(NN.N%)"
// Type layouts sometimes change. When that happens, until the next bootstrap
// bump occurs, stage1 and stage2 will give different outputs for this test.
// Add an `ignore-stage1` comment marker to work around that problem during
// that time.
// The aim here is to include at least one of every different type of top-level
// AST/HIR node reported by `-Zinput-stats`.
#![allow(dead_code)]
use std::arch::asm;
use std::fmt::Debug;
use std::ffi::c_void;
extern "C" { fn f(p: *mut c_void); }
/// An enum.
enum E<'a, T: Copy> { A { t: T }, B(&'a u32) }
trait Go {
type G: Debug;
fn go(self) -> u32;
}
impl<'a, T: Copy> Go for E<'a, T> {
type G = bool;
fn go(self) -> u32 {
99
}
}
fn f2<T>(t: T) where T: Debug {}
fn main() {
let x = E::A { t: 3 };
match x {
E::A { .. } => {}
_ => {}
}
// NOTE(workingjubilee): do GPUs support NOPs? remove this cfg if they do
#[cfg(not(any(target_arch = "nvptx64", target_arch = "amdgpu")))]
unsafe { asm!("nop"); }
}
|
