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authorJonas Schievink <jonasschievink@gmail.com>2020-10-11 01:14:12 +0200
committerJonas Schievink <jonasschievink@gmail.com>2020-10-11 01:14:12 +0200
commit9a47f74bfe0276fdac849da8d71aa9378ed9affb (patch)
tree2c2b7f1fe356770a77b26649c72758618ce61f4a /compiler/rustc_codegen_ssa/src
parent432535da2b5144d467056efcfa6864d35ba2de0f (diff)
downloadrust-9a47f74bfe0276fdac849da8d71aa9378ed9affb.tar.gz
rust-9a47f74bfe0276fdac849da8d71aa9378ed9affb.zip
Use SmallVec in SwitchTargets
This allows building common SwitchTargets (eg. for `if`s) without
allocation.
Diffstat (limited to 'compiler/rustc_codegen_ssa/src')
-rw-r--r--compiler/rustc_codegen_ssa/src/mir/block.rs2
1 files changed, 1 insertions, 1 deletions
diff --git a/compiler/rustc_codegen_ssa/src/mir/block.rs b/compiler/rustc_codegen_ssa/src/mir/block.rs
index 8d57ccdba6d..353189ae1f0 100644
--- a/compiler/rustc_codegen_ssa/src/mir/block.rs
+++ b/compiler/rustc_codegen_ssa/src/mir/block.rs
@@ -196,7 +196,7 @@ impl<'a, 'tcx, Bx: BuilderMethods<'a, 'tcx>> FunctionCx<'a, 'tcx, Bx> {
         mut bx: Bx,
         discr: &mir::Operand<'tcx>,
         switch_ty: Ty<'tcx>,
-        targets: &SwitchTargets<'tcx>,
+        targets: &SwitchTargets,
     ) {
         let discr = self.codegen_operand(&mut bx, &discr);
         // `switch_ty` is redundant, sanity-check that.